About this role
Implement Verilog RTL for SoC sections and integrate IPs while optimizing performance through synthesis and timing closure. Support design verification, emulation, and debugging across pre-silicon and post-silicon stages.
Requires a Bachelor's or Master's degree in Electrical or Computer Engineering with at least 5 years of semiconductor R&D experience. Proficiency in Verilog RTL, SoC architecture, and scripting languages like Perl, Shell, or TCL is essential.
What they're looking for
Verilog RTLSoC ArchitectureLogic DesignSynthesisTiming ClosurePower ReductionFloorplanningDesign Verification
Frequently asked questions
What does a Senior/Staff Front-End Engineer (SOC) at Bitdeer Technologies Group do?
Implement Verilog RTL for SoC sections and integrate IPs while optimizing performance through synthesis and timing closure. Support design verification, emulation, and debugging across pre-silicon and post-silicon stages. Requires a Bachelor's or Master's degree in Electrical or Computer Engineering…
What skills does this Senior/Staff Front-End Engineer (SOC) role need?
Key skills for this role include Verilog RTL, SoC Architecture, Logic Design, Synthesis, Timing Closure, Power Reduction.
How much does a Senior/Staff Front-End Engineer (SOC) at Bitdeer Technologies Group pay?
The employer did not list a salary for this role. Most similar Singapore roles publish their band on the job page.
Is this Senior/Staff Front-End Engineer (SOC) role remote, hybrid, or on-site?
This role is on-site, based in Singapore.
How do I apply for this Senior/Staff Front-End Engineer (SOC) role?
You can apply directly on Bitdeer Technologies Group's careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.