Research Fellow (Ic Designer)

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal. NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Fellow-%28IC-Designer%29/33439-en_GB/ We regret that only shortlisted candidates will be notified. Job Description We are looking for a Research Fellow for the (SHINE) Centre 2.0 co-led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS). The selected candidate is expected to work on: • physical, thermal and circuit-to-system modeling, design exploration, architecture and validation/testing framework • high-level exploration and modeling for predictive power management • predictive power management from circuits to voltage-aware model optimization and test chip demonstration • predictive power management from circuits to voltage and temperature-aware model optimization and test chip demonstration • predictive power management runtime adaptation for accurate event detection with test chip demonstration • full integration of voltage/temperature-aware circuits, models and runtime adaptation for accurate event detection • authoring high-quality research papers for leading conferences and journals and presenting findings at international conferences. • managing technical milestones for the project and providing technical guidance to PhD and master’s students within the group. The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience. Qualifications The candidate must possess: • A PhD degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering). • Knowledge on circuit architectures, transistor-level design. • Knowledge on silicon chip design, EDA tools. • Ability to work independently and collaboratively…