About this role
Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low power consumption Drive ISP Design activities in close collaboration with ISP Algorithm Team Requirements Minimum MSEE, or BSEE, or related/equivalent discipline Experience / knowledge in RTL, C/C++ programming and verification Strong debugging and problem-solving skills Good communication and interpersonal skills Results-oriented and adaptable to changes C++/SystemC knowledge with High Level Synthesis experience is a plus. Experience / knowledge in CMOS Image Sensor is a plus
What they're looking for
RTL CodingElectricalDigital DesignRTL Design
About Omnivision Technologies Singapore Pte. Ltd.
Frequently asked questions
What does a Isp Rtl Design Engineer at Omnivision Technologies Singapore Pte. Ltd. do?
Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low power consumption Drive ISP Design activities in close collaboration w…
What skills does this Isp Rtl Design Engineer role need?
Key skills for this role include RTL Coding, Electrical, Digital Design, RTL Design.
How much does a Isp Rtl Design Engineer at Omnivision Technologies Singapore Pte. Ltd. pay?
This role lists a salary of S$5,000 – S$8,000 per month.
Is this Isp Rtl Design Engineer role remote, hybrid, or on-site?
The listing is based in D22 Jurong, Jurong Island, Tuas. Check the posting for remote or hybrid options.
How do I apply for this Isp Rtl Design Engineer role?
You can apply directly on Omnivision Technologies Singapore Pte. Ltd.'s careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.