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Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort)

Qualcomm

Singapore, Central Singapore, SingaporeFull-timeOn-site

Posted 29 Jan 2026

About this role

Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort) at Qualcomm.

Frequently asked questions

What does a Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort) at Qualcomm do?

Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort) at Qualcomm.

How much does a Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort) at Qualcomm pay?

The employer did not list a salary for this role. Most similar Singapore roles publish their band on the job page.

Is this Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort) role remote, hybrid, or on-site?

This role is on-site, based in Singapore, Central Singapore, Singapore.

How do I apply for this Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort) role?

You can apply directly on Qualcomm's careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.