About this role
Architect, implement, and validate baseband signal processing pipelines on modern FPGAs for Software Defined Radio products. Manage the end-to-end flow from algorithm prototyping and RTL implementation to hardware-in-the-loop validation and production readiness.
Requires 3-7 years of experience in digital communications or DSP with proficiency in VHDL/Verilog and MATLAB/Python. Candidates must have strong knowledge of digital modulation schemes and experience with RF lab test equipment.
What they're looking for
FPGA DesignVHDL/VerilogDigital Signal ProcessingSDR ArchitectureMATLAB/SimulinkPythonTiming ClosureRF Testing
Frequently asked questions
What does a Senior / FPGA Engineer at ST Engineering Group do?
Architect, implement, and validate baseband signal processing pipelines on modern FPGAs for Software Defined Radio products. Manage the end-to-end flow from algorithm prototyping and RTL implementation to hardware-in-the-loop validation and production readiness. Requires 3-7 years of experience in d…
What skills does this Senior / FPGA Engineer role need?
Key skills for this role include FPGA Design, VHDL/Verilog, Digital Signal Processing, SDR Architecture, MATLAB/Simulink, Python.
How much does a Senior / FPGA Engineer at ST Engineering Group pay?
The employer did not list a salary for this role. Most similar Singapore roles publish their band on the job page.
Is this Senior / FPGA Engineer role remote, hybrid, or on-site?
This role is on-site, based in Singapore.
How do I apply for this Senior / FPGA Engineer role?
You can apply directly on ST Engineering Group's careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.