Technical Manager – Npu Physical Design

Technical Manager – NPU Physical Design Location: Singapore Employment Type: Full-Time Industry: Semiconductor | AI Hardware | ASIC | VLSI Drive the Future of AI Silicon Are you passionate about building next-generation AIprocessors? We are seeking an experienced Technical Manager – NPU PhysicalDesign to lead the physical implementation of high-performance NeuralProcessing Units (NPUs) on advanced semiconductor process nodes. In this leadership role, you will drive the completephysical design flow—from RTL synthesis to tapeout—while mentoring engineeringteams and collaborating with cross-functional experts to deliver world-class AIsilicon solutions. Note: This position is part of our strategic talentpipeline for upcoming projects and future expansion. While it is not animmediate hiring requirement, we are actively identifying exceptionalcandidates for future opportunities. Key Responsibilities As a Technical Manager, you will lead the successful implementation of advanced NPU designs by: Driving the complete ASIC physical design flow, including: RTL Synthesis, Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, Physical Verification (PV) Managing sign-off activities to ensure first-pass silicon success, including: Static Timing Analysis (STA)EM/IR Analysis Physical Verification Collaborating closely with RTL, DFT, STA, Packaging, and Design teams throughout the product development lifecycle. Planning, tracking, and executing physical design projects while ensuring milestone and tapeout commitments are achieved. Identifying technical risks and driving effective resolution strategies. Providing technical leadership, mentoring engineers, and fostering engineering excellence. Working with EDA vendors to evaluate and optimize implementation methodologies. Preparing technical documentation, project reports, presentations, and contributing to organizational knowledge sharing. What We're Looking For Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline. Minimum 10 years of hands-on experience in ASIC Physical Design. Strong expertise across the complete physical implementation flow, including: RTL Synthesis Place & Route (PnR) Static Timing Analysis (STA) EM/IR Analysis Physical Verification (PV) Proven track record of delivering successful tapeouts for complex ASIC or SoC products. Strong understanding of Power, Performance, and Area (PPA) optimization techniques. Demonstrated experience leading technical teams, mentoring engineers, and managing project execution. Excellent communication, presentation, and stakeholder management skills. Technical Skills Hands-on experience with industry-standard EDA tools, including one or more of the following: Synthesis: Synopsys Design Compiler, Fusion Compiler, Cadence Genus Physical Design: Synopsys IC Compiler II, Cadence Innovus Timing Analysis: Synopsys PrimeTime Power Integrity: Cadence Voltus Physical Verification: Siemens Calibre Preferred Qualifications Experience with advanced semiconductor technologies, including 3nm, 2nm, or below. Exposure to AI accelerators, NPU, GPU, HPC, or high-performance SoC development. Strong project management and cross-functional leadership experience. Passion for continuous improvement, innovation, and engineering excellence. Why Join Us? Work on next-generation AI and machine learning hardware. Contribute to breakthrough NPU and advanced semiconductor technologies. Collaborate with globally recognized engineering experts. Lead technically challenging projects using the latest EDA methodologies and advanced process nodes. Enjoy excellent opportunities for career growth, technical leadership, and professional development. Be part of a collaborative culture focused on innovation, quality, and engineering excellence. Build the Next Generation of AI Computing If you have a passion for advanced physical design, successful silicon tapeouts, and leading high-performing engineering teams, we would love to connect with you. Apply today and be part of our talent network for exciting future opportunities in AI semiconductor innovation.