About this role
Support NAND package and silicon integration for next-generation memory products through chip-package interaction assessments and yield investigations. Collaborate with cross-functional teams to execute test vehicles, DOEs, and maintain technical documentation for design reviews.
Requires a Bachelor's or Master's degree in Engineering (Mechanical, Materials Science, Electrical, Chemical, or related) with less than 2 years of relevant experience. Candidates should have a fundamental understanding of semiconductor manufacturing and proficiency in structured problem-solving methods like FMEA and DOE.
What they're looking for
Chip-Package InteractionWafer DicingDFMEAPFMEADOEData AnalysisSemiconductor PackagingSilicon Integration
Frequently asked questions
What does a ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION at Micron Technology do?
Support NAND package and silicon integration for next-generation memory products through chip-package interaction assessments and yield investigations. Collaborate with cross-functional teams to execute test vehicles, DOEs, and maintain technical documentation for design reviews. Requires a Bachelor…
What skills does this ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION role need?
Key skills for this role include Chip-Package Interaction, Wafer Dicing, DFMEA, PFMEA, DOE, Data Analysis.
How much does a ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION at Micron Technology pay?
The employer did not list a salary for this role. Most similar Singapore roles publish their band on the job page.
Is this ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION role remote, hybrid, or on-site?
This role is on-site, based in Singapore.
How do I apply for this ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION role?
You can apply directly on Micron Technology's careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.