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Senior ATE Test Engineer: FPGA/SoC Optimization

CareerArc

SingaporeFull-timeS$70 – S$110/mo

Posted 22 Jul 2026

About this role

AMD Singapore is seeking a Test Engineer with 3–5 years of ATE test program development to enable high-quality FPGA and SoC products. You will collaborate with test pattern developers and product engineers to optimize test coverage, yield, and cost. The role emphasizes strong Python and C++ skills, Linux proficiency, and hands-on experience with Advantest T2000 and Verigy93000 platforms. Join a collaborative team delivering cutting-edge hardware solutions. J-18808-Ljbffr

Frequently asked questions

What does a Senior ATE Test Engineer: FPGA/SoC Optimization at CareerArc do?

AMD Singapore is seeking a Test Engineer with 3–5 years of ATE test program development to enable high-quality FPGA and SoC products. You will collaborate with test pattern developers and product engineers to optimize test coverage, yield, and cost. The role emphasizes strong Python and C++ skills, …

How much does a Senior ATE Test Engineer: FPGA/SoC Optimization at CareerArc pay?

This role lists a salary of S$70 – S$110 per month.

Is this Senior ATE Test Engineer: FPGA/SoC Optimization role remote, hybrid, or on-site?

The listing is based in Singapore. Check the posting for remote or hybrid options.

How do I apply for this Senior ATE Test Engineer: FPGA/SoC Optimization role?

You can apply directly on CareerArc's careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.