Dadaconsultants Pte. Ltd. logo

Logic Design & Verification Engineer (Rtl / Uvm / Asic Development)

Dadaconsultants Pte. Ltd.

D05 Pasir Panjang, Hong Leong Garden, Clementi New TownFull TimeS$7,000 – S$12,000/mo

Posted 20 Jul 2026

About this role

My Client: My client is a fast-growing global technology company building high-performance chip systems for large-scale computing applications. The engineering team focuses on digital front-end design and verification, delivering robust and scalable ASIC solutions.The team works in a highly collaborative and engineering-driven environment, combining RTL design, verification methodologies, and system-level optimization. They are currently expanding their front-end engineering team to support next-generation chip development. Job Responsibilities: Design and implement RTL modules using Verilog/SystemVerilog for ASIC/SoC projects. Develop and execute verification plans, including testbench development using UVM methodology. Perform functional verification, debugging, and coverage analysis to ensure design correctness. Participate in SoC integration, testability (DFT) design, and overall front-end development flow. Collaborate with architecture, physical design, and software teams to ensure seamless integration. Contribute to automation and tooling improvements using scripting languages. Job Requirements: Bachelor’s degree or above in Electrical Engineering, Computer Engineering, or related fields. Understanding of digital design fundamentals and IC development flow. Familiarity with Verilog/SystemVerilog and basic RTL design concepts. Exposure to verification methodologies (e.g., UVM) is a plus. Basic scripting skills (Python / Shell) preferred. Strong analytical thinking, problem-solving ability, and learning agility. What They Offer: Opportunity to work on advanced ASIC/SoC projects with real-world impact. Exposure to both design and verification in a full front-end flow. Clear career progression in chip design and verification domains. About Us Dada Consultants was established in 2017, with the commitment of providing the best recruitment services in Singapore. We are comprised of a dynamic head-hunting team dedicated to sourcing for highly competent professionals in IT industry. We provide enterprises with customized talent solutions, and bring talents to career advancement. If it sounds like your next move, please don’t hesitate to apply. Kindly note that only shortlisted candidates will be contacted. Appreciate your understanding. Data provided is for recruitment purposes only. www.dadaconsultants.com EA Registration Number: R2197058 Business Registration Number: 201735941W. Licence Number: 18S9037

What they're looking for

Responsibilities

  • Design and implement RTL modules using Verilog/SystemVerilog for ASIC/SoC projects
  • Develop and execute verification plans, including testbench development using UVM methodology
  • Perform functional verification, debugging, and coverage analysis
  • Participate in SoC integration, testability (DFT) design, and front-end development flow
  • Collaborate with architecture, physical design, and software teams
  • Contribute to automation and tooling improvements using scripting languages

Required

  • Bachelor’s degree or above in Electrical Engineering, Computer Engineering, or related fields
  • Understanding of digital design fundamentals and IC development flow
  • Familiarity with Verilog/SystemVerilog and basic RTL design concepts
  • Strong analytical thinking, problem-solving ability, and learning agility

Nice to have

  • Exposure to verification methodologies (e.g., UVM)
  • Basic scripting skills (Python / Shell)

About Dadaconsultants Pte. Ltd.

Industry: Administrative & support servicesSize: 20Website ↗

Frequently asked questions

What does a Logic Design & Verification Engineer (Rtl / Uvm / Asic Development) at Dadaconsultants Pte. Ltd. do?

My Client: My client is a fast-growing global technology company building high-performance chip systems for large-scale computing applications. The engineering team focuses on digital front-end design and verification, delivering robust and scalable ASIC solutions.The team works in a highly collabor…

What skills does this Logic Design & Verification Engineer (Rtl / Uvm / Asic Development) role need?

Key skills for this role include Agility, Computer Engineering, Architecture, Digital IC Design.

How much does a Logic Design & Verification Engineer (Rtl / Uvm / Asic Development) at Dadaconsultants Pte. Ltd. pay?

This role lists a salary of S$7,000 – S$12,000 per month.

Is this Logic Design & Verification Engineer (Rtl / Uvm / Asic Development) role remote, hybrid, or on-site?

The listing is based in D05 Pasir Panjang, Hong Leong Garden, Clementi New Town. Check the posting for remote or hybrid options.

How do I apply for this Logic Design & Verification Engineer (Rtl / Uvm / Asic Development) role?

You can apply directly on Dadaconsultants Pte. Ltd.'s careers page. ApplyLah can tailor your résumé and cover letter to this exact role in seconds first.