Physical Verification Engineer(Drc/Lvs/Ant/Erc/Lpe/Esd) X 12 Months Contract

Job responsibilities Co-work with PDK team to code and maintain DRC/LVS/ANT/ERC/LPE/ESD rule deck for various processes. Responsible for Full-chip Physical Verification Sign-off in area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Coordinates with internal IP owners on IP related issues. Coordinates with Manufacturing Team on DRC related issues. Provide automation solutions to improve efficiency in tape-out flow. Report on tapeout PV issues. Job requirements: Bachelor/Master’s Degree in Electrical/Electronic Engineering/Computer Science Familiar with IC Design front-to-backend flow Preferably well-versed in Calibre, ICV, Assura, Star-RCXT Proficient in script programming, such as Python, TCL, Perl, or C-shell Proficient in UNIX (Linux) platforms Strong communication skills, problem solving and analytical skills. Interested candidates may send resumes to khaiven.tay@persolapac.com or apply through the application system. Regret to inform that only shortlisted candidates will be notified. PERSOL Singapore Pte Ltd • RCB No. 200007268E EA License No. 01C4394 • EA Registration No. R21101254 (Tay Khai Ven) By sending us your personal data and curriculum vitae (CV), you are deemed to consent to PERSOL Singapore Pte Ltd and its local and overseas subsidiaries and affiliates to collect, use and disclose your personal data to prospective employers/companies based in any country for purposes of evaluating suitability for employment, conducting reference checks, administering employment related services, complying with Government’s health advisories and such other purposes stated in our Privacy Policy. Our full Privacy Policy is available at https://www.persolsingapore.com/policies. If you wish to withdraw your consent, please drop us an email to let us know. Please feel free to contact us if you have any queries.